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Audet, D., Savaria, Y., & Arel, N. (janvier 1994). Architectural approach for increasing clock frequency and communication speed in monolithic-WSI systems [Communication écrite]. 6th Annual IEEE International Conference on Wafer Scale Integration, San Francisco, California. Lien externe
Audet, D., Savaria, Y., & Arel, N. (1994). Pipelining communications in large VLSI/ULSI systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2(1), 1-10. Lien externe