Documents publiés en "1994"
Monter d'un niveauDépartement de génie électrique
Rayapati, V. N., & Kamińska, B. (1994). A dynamic reconfiguration scheme for mega bit static random access memories. Microelectronics and reliability, 34(1), 107-114. Lien externe
Rayapati, V. N., & Kamińska, B. (août 1994). Mega bit BiCMOS SRAM chip package modelling and performance analysis [Communication écrite]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, CA, USA. Lien externe
Rayapati, V. N., & Kamińska, B. (août 1994). Mega bit CMOS SRAM chip failure analysis using external electrical testing and internal contactless laser beam testing [Communication écrite]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, CA, USA. Lien externe
Département de génie informatique et génie logiciel
Rayapati, V. N., & Kamińska, B. (1994). A dynamic reconfiguration scheme for mega bit static random access memories. Microelectronics and reliability, 34(1), 107-114. Lien externe
Rayapati, V. N., & Kamińska, B. (août 1994). Mega bit BiCMOS SRAM chip package modelling and performance analysis [Communication écrite]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, CA, USA. Lien externe
Rayapati, V. N., & Kamińska, B. (août 1994). Mega bit CMOS SRAM chip failure analysis using external electrical testing and internal contactless laser beam testing [Communication écrite]. IEEE International Workshop on Memory Technology, Design, and Testing, San Jose, CA, USA. Lien externe