 | Monter d'un niveau |
Belabbes, N., Guterman, A., Savaria, Y., & Dagenais, M. (mai 1992). Ratioed voter circuit for testing and fault-tolerance in VLSI processing arrays [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1992), San Diego, CA, United states. Lien externe
