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Kamińska, B., Savaria, Y., & Houle, J.-L. (avril 1988). Design model on performance prediction for VLSI systems [Communication écrite]. System Design: Concepts, Methods and Tools (COMPEURO 1988), Brussels, Belgium. Lien externe
Savaria, Y., & Kamińska, B. (juin 1988). Force-observe, a new design for testability approach (CMOS VLSI circuits) [Communication écrite]. International Symposium on Circuits and Systems (ISCAS 1988), Espoo, Finland. Lien externe
Stannard, D. H., & Kamińska, B. (septembre 1988). Detection of hard faults in a combinational circuit using budget constraints [Communication écrite]. International Test Conference 1988, Washington, DC, USA. Lien externe
