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Le Beux, S., Li, H., Nicolescu, G., Trajkovic, J., & O'Connor, I. (2014). Optical crossbars on chip, a comparative study based on worst-case losses. Concurrency Computation Practice and Experience, 26(15), 2492-2503. Lien externe
Trajkovic, J., Abdi, S., Nicolescu, G., & Gajski, D. D. (2012). Automated generation of custom processor core from C code. Journal of Electrical and Computer Engineering, 2012, 1-26. Disponible
Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2010). Multi-optical network-on-chip for large scale MPSoC. IEEE Embedded Systems Letters, 2(3), 77-80. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (mai 2018). DeEPeR: Enhancing performance and reliability in chip-Scale optical interconnection networks [Communication écrite]. 28th Great Lakes Symposium on VLSI (GLSVLSI 2018), Chicago, IL. Lien externe
Nikdast, M., Nicolescu, G., Trajkovic, J., & Liboiron-Ladouceur, O. (novembre 2015). Silicon photonic integrated circuits under process variations [Communication écrite]. Asia Communications and Photonics Conference (ACPC 2015), Hong Kong. Lien externe
Le Beux, S., Li, H., O'Connor, I., Cheshmi, K., Liu, X., Trajkovic, J., & Nicolescu, G. (mars 2014). Chameleon: Channel efficient optical network-on-chip [Communication écrite]. 17th Design, Automation and Test in Europe (DATE 2014), Dresden, Germany. Lien externe
Ben Cheikh, T. L., Nicolescu, G., Trajkovic, J., Bouchebaba, Y., & Paulin, P. (juin 2014). Fast and accurate implementation of Canny edge detector on embedded many-core platform [Communication écrite]. 12th IEEE International New Circuits and Systems Conference (NEWCAS 2014), Trois-Rivieres, QC, Canada. Lien externe
Le Beux, S., O'Connor, I., Li, Z., Letartre, X., Monat, C., Trajkovic, J., & Nicolescu, G. (mai 2013). Potential and pitfalls of silicon photonics computing and interconnect [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2013), Beijing, China. Lien externe
Le Beux, S., Trajkovic, J., O'Connor, I., & Nicolescu, G. (octobre 2011). Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC) [Communication écrite]. 19th IEEE/IFIP International Conference on VLSI and System-on-Chip (VLSI-SoC 2011), Kowloon, Hong kong. Lien externe
Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (mars 2011). Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe
Trajkovic, J., & Gajski, D. D. (juin 2010). Early performance-cost estimation of application-specific data path pipelining [Communication écrite]. IEEE 8th Symposium on Application Specific Processors (SASP 2010), Anaheim, California. Lien externe
