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Documents dont l'auteur est "Tahar, Sofiène"

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Nombre de documents: 10

Soualhia, M., Khomh, F., & Tahar, S. (septembre 2021). Failure analysis of hadoop schedulers using an integration of model checking and simulation [Communication écrite]. 9th International Symposium on Symbolic Computation in Software Science (SCSS 2021). Lien externe

Soualhia, M., Khomh, F., & Tahar, S. (2020). A Dynamic and Failure-aware Task Scheduling Framework for Hadoop. IEEE Transactions on Cloud Computing, 8(2), 553-569. Lien externe

Barkaoui, K., Boucheneb, H., Mili, A., & Tahar, S. (août 2017). Verification and evaluation of computer and communication systems [Communication écrite]. 11th International Conference on Verification and Evaluation of Computer and Communication Systems (VECoS 2017), Montréal, Québec. Lien externe

Soualhia, M., Khomh, F., & Tahar, S. (décembre 2015). ATLAS: an adaptive failure-aware scheduler for Hadoop [Communication écrite]. 34th IEEE International Performance Computing and Communications Conference (IPCCC 2015), Nanjing, China (8 pages). Lien externe

Soualhia, M., Khomh, F., & Tahar, S. (août 2015). Predicting scheduling failures in the cloud: A case study with google clusters and hadoop on Amazon EMR [Communication écrite]. 17th IEEE International Conference on High Performance Computing and Communications, IEEE 7th International Symposium on Cyberspace Safety and Security and IEEE 12th International Conference on Embedded Software and Systems (HPCC-ICESS-CSS 2015), New York, NY, United states. Lien externe

Al-Akhras, S. I., Tahar, S., Nicolescu, G., Langevin, M., & Paulin, P. (décembre 2012). On the verification of a WiMax design using symbolic simulation [Communication écrite]. 4th International Symposium on Symbolic Computation in Software Science, Gammarth, Tunisia. Publié dans Electronic Proceedings in Theoretical Computer Science, 122. Disponible

Cheikh, T. L. B., Beltrame, G., Nicolescu, G., Cheriet, F., & Tahar, S. (juin 2012). Parallelization strategies of the canny edge detector for multi-core CPUs and many-core GPUs [Communication écrite]. 10th IEEE International New Circuits and Systems Conference (NEWCAS 2012), Montréal, Québec. Lien externe

Dong, Z. J., Zaki, M. H., Sammane, G. A., Tahar, S., & Bois, G. (décembre 2007). Checking properties of PLL designs using run-time verification [Communication écrite]. International Conference on Microelectronics (ICM 2007), Cairo, Egypt (4 pages). Lien externe

Al Sammane, G., Zaki, M. H., Tahar, S., & Bois, G. (août 2007). Constraint-based verification of delta-sigma modulators using interval analysis [Communication écrite]. 50th Midwest Symposium on Circuits and Systems (MWSCAS 2007), Montreal, Qc, Canada (4 pages). Lien externe

Zaki, M. H., Tahar, S., & Bois, G. (avril 2006). A practical approach for monitoring analog circuits [Communication écrite]. Great Lakes Symposium on VLSI (GLSVLSI 2006), Philadelphia, PA, USA. Lien externe

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