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Documents dont l'auteur est "Paulin, Pierre"

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Nombre de documents: 9

A

Al-Akhras, S. I., Tahar, S., Nicolescu, G., Langevin, M., & Paulin, P. (décembre 2012). On the verification of a WiMax design using symbolic simulation [Communication écrite]. 4th International Symposium on Symbolic Computation in Software Science, Gammarth, Tunisia. Publié dans Electronic Proceedings in Theoretical Computer Science, 122. Disponible

B

Ben Cheikh, T. L., Nicolescu, G., Trajkovic, J., Bouchebaba, Y., & Paulin, P. (juin 2014). Fast and accurate implementation of Canny edge detector on embedded many-core platform [Communication écrite]. 12th IEEE International New Circuits and Systems Conference (NEWCAS 2014), Trois-Rivieres, QC, Canada. Lien externe

Bouchebaba, Y., Ozcan, A.-E., Paulin, P., & Nicolescu, G. (juin 2010). MpAssign : a Framework for Solving the Many-Core Platform Mapping Problem [Communication écrite]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, Virginia. Publié dans Journal of Software: Practice and Experience, 42(7). Lien externe

Bouchebaba, Y., Paulin, P., & Nicolescu, G. (2012). MpAssign : a framework for solving the many-core platform mapping problem. Dans Design technology for heterogeneous embedded systems (p. 197-221). Lien externe

Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E. M., Lavigueur, B., & Paulin, P. (2007). MPSoC memory optimization using program transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), 43-43. Lien externe

G

Girodias, B., Iugan, L. G., Bouchebaba, Y., Nicolescu, G., Abouhamid, E. M., Langevin, M., & Paulin, P. (2012). Integrating memory optimization with mapping algorithms for multi-processors system-on-chip. Transactions on Embedded Computing Systems, 11(3), 1-26. Lien externe

L

Le Beux, S., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2013). Reduction methods for adapting optical network on chip topologies to 3D architectures. Microprocessors and Microsystems, 37(1), 87-98. Lien externe

Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (mars 2011). Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology [Communication écrite]. 14th Design, Automation and Test in Europe Conference and Exhibition (DATE 2011), Grenoble, France. Lien externe

Le Beux, S., Trajkovic, J., O'Connor, I., Nicolescu, G., Bois, G., & Paulin, P. (2010). Multi-optical network-on-chip for large scale MPSoC. IEEE Embedded Systems Letters, 2(3), 77-80. Lien externe

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