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This graph maps the connections between all the collaborators of {}'s publications listed on this page.
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Mbaye, M. M., Belanger, N., Savaria, Y., & Pierre, S. (2012). Loop Acceleration Exploration for ASIP Architecture. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(4), 684-696. External link
Mbaye, M. M. (2010). Techniques d'exploration architecturale de design à usage spécifique pour l'accélération de boucles [Ph.D. thesis, École Polytechnique de Montréal]. Available
Mbaye, M. M. (2004). Conception, mise en oeuvre et caractérisation de mécanismes matériel/logiciel pour l'interconnexion firewire-ethernet [Master's thesis, École Polytechnique de Montréal]. Available