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Rogers-Vallée, M., Cantin, M.-A., Moss, L., & Bois, G. (octobre 2010). IP characterization methodology for fast and accurate power consumption estimation at transactional level model [Communication écrite]. IEEE International Conference on Computer Design (ICCD 2010), Amsterdam, Netherlands. Lien externe
Moss, L., Cantin, M.-A., Bois, G., & Mostapha Aboulhamid, E. (juin 2008). Automation of communication refinement and hardware synthesis within a system-level design methodology [Communication écrite]. 19th IEEE/IFIP International Symposium on Rapid System Prototyping. Lien externe
Cantin, M.-A., Savaria, Y., Prodanos, D., & Lavoie, P. (2006). A metric for automatic word-length determination of hardware datapaths. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(10), 2228-31. Lien externe
Catudal, S., Cantin, M.-A., & Savaria, Y. (2004). Performance driven validation applied to video processing. WSEAS Transactions on Electronics, 1(3), 568-575. Non disponible
Lafrance, L.-P., Cantin, M.-A., Savaria, Y., Sung, S. H., & Lavoie, P. (mai 2002). Architecture and performance characterization of hardware and software implementations of the Crozier frequency estimation algorithm [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe
Cantin, M.-A., Savaria, Y., & Lavoie, P. (mai 2002). A comparison of automatic word length optimization procedures [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Phoenix-Scottsdale, AZ. Lien externe
Cantin, M.-A., Savaria, Y., Prodanos, D., & Lavoie, P. (mai 2001). An automatic word length determination method [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, NSW, Australia. Lien externe
Cantin, M.-A., Blaquière, Y., Savaria, Y., Lavoie, P., & Granger, É. (mai 2000). Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. Lien externe
Poiré, P., Cantin, M.-A., Daniel, H., Blaquière, Y., Savaria, Y., Pocek, K. L., & Arnold, J. M. (avril 1998). A comparative analysis of fuzzy ART neural network implementations: the advantages of reconfigurable computing [Communication écrite]. IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley, CA. Lien externe
Granger, É., Blaquière, Y., Savaria, Y., Cantin, M.-A., & Lavoie, P. (août 1996). VLSI architecture for fast clustering with fuzzy ART neural networks [Communication écrite]. 1st International Workshop on Neural Networks for Identification, Control, Robotics, and Signal/Image Processing (NICROSP 1996), Venice, Italy. Lien externe