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Items where Author is "Bouchebaba, Youcef"

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Number of items: 12.

B

Ben Cheikh, T. L., Nicolescu, G., Trajković, J., Bouchebaba, Y., & Paulin, P. (2014, June). Fast and accurate implementation of Canny edge detector on embedded many-core platform [Paper]. 12th IEEE International New Circuits and Systems Conference (NEWCAS 2014), Trois-Rivieres, QC, Canada. External link

Bouchebaba, Y., Ozcan, A.-E., Paulin, P., & Nicolescu, G. (2010, June). MpAssign : a Framework for Solving the Many-Core Platform Mapping Problem [Paper]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, Virginia. Published in Journal of Software: Practice and Experience, 42(7). External link

Bouchebaba, Y., Paulin, P., & Nicolescu, G. (2012). MpAssign : a framework for solving the many-core platform mapping problem. In Design technology for heterogeneous embedded systems (pp. 197-221). External link

Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gafflot, F., & O'Connor, I. (2007, August). Architectural exploration of optical and electrical interconnects in MPSoC [Paper]. IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montreal, QC, Canada (4 pages). External link

Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., & Aboulhamid, E. M. (2004, September). Buffer and register allocation for memory space optimization [Paper]. IEEE 15th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2004), Galveston, Texas. Published in Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 49(1). External link

Bouchebaba, Y., Girodias, B., Nicolescu, G., Aboulhamid, E. M., Lavigueur, B., & Paulin, P. (2007). MPSoC memory optimization using program transformation. ACM Transactions on Design Automation of Electronic Systems, 12(4), 43-43. External link

Briere, M., Girodias, B., Bouchebaba, Y., Nicolescu, G., Mieyeville, F., Gaffiot, F., & O'Connor, I. (2007, April). System level assessment of an optical NoC in an MPSoC platform [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. External link

Bouchebaba, Y., Gagné, V., Nicolescu, G., & Aboulhamid, M. (2006, June). SoC memory optimization using loop transformations [Paper]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. External link

G

Girodias, B., Iugan, L. G., Bouchebaba, Y., Nicolescu, G., Abouhamid, E. M., Langevin, M., & Paulin, P. (2012). Integrating memory optimization with mapping algorithms for multi-processors system-on-chip. Transactions on Embedded Computing Systems, 11(3), 1-26. External link

Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Langevin, M., & Paulin, P. (2010, June). Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip [Paper]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, VA, USA. External link

Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (2006, June). Application-level memory optimization for MPSoC [Paper]. 17th IEEE International Workshop on Rapid System Prototyping, Chania, Crete, Greece. External link

L

Le Beux, S., Nicolescu, G., Bois, G., Bouchebaba, Y., Langevin, M., & Paulin, P. (2009, July). Optimizing configuration and application mapping for MPSoC architectures [Paper]. NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2009), San Francisco, California. External link

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