 | Up a level |
Ardakani, A., Condo, C., Ahmadi, M., & Gross, W. J. (2018). An architecture to accelerate convolution in deep neural networks. IEEE Transactions on Circuits and Systems I: Regular Papers, 65(4), 1349-1362. External link
Ardakani, A., Leduc-Primeau, F., Onizawa, N., Hanyu, T., & Gross, W. J. (2017). VLSI Implementation of Deep Neural Network Using Integral Stochastic Computing. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(10), 2688-2699. External link
Ardakani, A., Leduc-Primeau, F., & Gross, W. J. (2016, March). Hardware implementation of FIR/IIR digital filters using integral stochastic computation [Paper]. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2016), Shanghai, China. External link
Ardakani, A., Leduc-Primeau, F., Onizawa, N., Hanyu, T., & Gross, W. J. (2016, September). VLSI implementation of deep neural networks using integral stochastic computing [Paper]. 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC 2016), Brest, France. External link
