Documents dont l'auteur est "Abuelnasr, Ahmed"

Pour citer ou exporter
Grouper par: Rôle | Auteurs ou autrices | Date de publication | Sous-type de document | Aucun groupement
Nombre de documents: 8

A

Altoobaji, I., Abuelnasr, A., Amer, M., Ali, M., Audet, Y., & Hassan, A. (juin 2025). A Tunable and Area-Efficient Delayed Fault Detection Circuit for Voltage Monitoring Systems with 10.19% Voltage Sensitivity [Communication écrite]. 23rd IEEE Interregional NEWCAS Conference (NEWCAS 2025), Paris, France. Lien externe

Abdelfatah, M. M. S., Abuelnasr, A., Amer, M., Savaria, Y., & Hassan, A. (juin 2025). A Comparative Analysis of Off-Policy DRL Strategies for Analog Circuit Optimization: A Case Study on Bandgap References [Communication écrite]. 23rd IEEE Interregional NEWCAS Conference (NEWCAS 2025), Paris, France. Lien externe

Amer, M., Abuelnasr, A., Hassan, A., & Savaria, Y. (novembre 2025). Comparative Thermal Analysis of Single vs. Arrayed Layouts for Integrated Power Transistors Using COMSOL [Communication écrite]. 32nd International Conference on Electronics, Circuits and Systems (ICECS 2025), Marrakech, Morocco (4 pages). Lien externe

Abuelnasr, A., Amer, M., Altoobaji, I., Hassan, A., & Savaria, Y. (novembre 2025). AI-Assisted Design of a Compact Voltage Monitoring System with a Millisecond-Delayed Fault Detection Circuit [Communication écrite]. 32nd International Conference on Electronics, Circuits and Systems (ICECS 2025), Marrakech, Morocco (4 pages). Lien externe

Amer, M., Abuelnasr, A., Ali, M., Hassan, A., Trigui, A., Ragab, A., Sawan, M., & Savaria, Y. (2024). Enhanced dynamic regulation in Buck Converters: integrating input-voltage feedforward with voltage-mode feedback. IEEE Access, 12, 7310-7328. Disponible

Abdelfatah, M. M. S., Novshadian, M., Abuelnasr, A., & Hassan, A. (novembre 2024). Attention-Based Dynamic Channel-Wise Pruning of Neural Networks with Knowledge Distillation Fine-Tuning [Communication écrite]. 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS 2024), Nancy, France. Lien externe

Abuelnasr, A., Amer, M., Ali, M., Hassan, A., Gosselin, B., Ragab, A. R. A., & Savaria, Y. (2023). Delay Mismatch Insensitive Dead Time Generator for High-Voltage Switched-Mode Power Amplifiers. IEEE Transactions on Circuits and Systems I: Regular Papers, 70(4), 1555-1565. Disponible

S

Savaria, Y., Ragab, A., Amer, M., Abuelnasr, A., & Gosselin, B. (2025). System and Method for Determining Optimized Device Parameters of a Multi-variable Architecture. (Demande de brevet no WO2025/163523 A1). Lien externe

Liste produite: Thu Oct 15 10:12:18 2026 EDT.