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An 800 Mbps system interconnect modeling and simulation for high speed computing

Mohammad S. Sharawi and D. N. Aloi

Paper (2005)

Document published while its authors were not affiliated with Polytechnique Montréal

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PolyPublie URL: https://publications.polymtl.ca/42115/
Conference Title: IEEE International Symposium on Circuits and Systems
Conference Location: Kobe, Japan
Conference Date(s): 2005-05-23 - 2005-05-26
Publisher: IEEE
DOI: 10.1109/iscas.2005.1466056
Official URL: https://doi.org/10.1109/iscas.2005.1466056
Date Deposited: 18 Apr 2023 15:18
Last Modified: 05 Apr 2024 11:39
Cite in APA 7: Sharawi, M. S., & Aloi, D. N. (2005, May). An 800 Mbps system interconnect modeling and simulation for high speed computing [Paper]. IEEE International Symposium on Circuits and Systems, Kobe, Japan. https://doi.org/10.1109/iscas.2005.1466056

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