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VIP: an FPGA-based processor for image processing and neural networks

J. Cloutier, E. Cosatto, S. Pigeon, François-Raymond Boyer and G. Simard

Paper (1996)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
PolyPublie URL: https://publications.polymtl.ca/41434/
Conference Title: 5th International Conference on Microelectronics for Neural Networks
Conference Location: Lausanne, Switzerland
Conference Date(s): 1996-02-12 - 1996-02-14
Publisher: IEEE
DOI: 10.1109/mnnfs.1996.493811
Official URL: https://doi.org/10.1109/mnnfs.1996.493811
Date Deposited: 18 Apr 2023 15:24
Last Modified: 05 Apr 2024 11:38
Cite in APA 7: Cloutier, J., Cosatto, E., Pigeon, S., Boyer, F.-R., & Simard, G. (1996, February). VIP: an FPGA-based processor for image processing and neural networks [Paper]. 5th International Conference on Microelectronics for Neural Networks, Lausanne, Switzerland. https://doi.org/10.1109/mnnfs.1996.493811

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