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Architectural approach for increasing clock frequency and communication speed in monolithic WSI systems

D. Audet and Yvon Savaria

Article (1994)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
PolyPublie URL: https://publications.polymtl.ca/33593/
Journal Title: IEEE Transactions on Components Packaging and Manufacturing Technology. Part B, Advanced Packaging (vol. 17, no. 3)
Publisher: Institute of Electrical and Electronics Engineers
DOI: 10.1109/96.311785
Official URL: https://doi.org/10.1109/96.311785
Date Deposited: 18 Apr 2023 15:25
Last Modified: 05 Apr 2024 11:24
Cite in APA 7: Audet, D., & Savaria, Y. (1994). Architectural approach for increasing clock frequency and communication speed in monolithic WSI systems. IEEE Transactions on Components Packaging and Manufacturing Technology. Part B, Advanced Packaging, 17(3), 362-368. https://doi.org/10.1109/96.311785

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