Article (2010)
An external link is available for this itemDepartment: | Department of Electrical Engineering |
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Research Center: | GR2M - Microelectronics and Microsystems Research Group |
PolyPublie URL: | https://publications.polymtl.ca/17924/ |
Journal Title: | IEEE Transactions on Circuits and Systems I: Regular Papers (vol. 57, no. 1) |
Publisher: | IEEE |
DOI: | 10.1109/tcsi.2009.2019396 |
Official URL: | https://doi.org/10.1109/tcsi.2009.2019396 |
Date Deposited: | 18 Apr 2023 15:13 |
Last Modified: | 25 Sep 2024 15:55 |
Cite in APA 7: | Marche, D., & Savaria, Y. (2010). Modeling R-2R segmented-ladder DACs. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(1), 31-43. https://doi.org/10.1109/tcsi.2009.2019396 |
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