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Hajizadeh, F., Bisson, P.-A., Ould-Bachir, T., & David, J. P. (juin 2025). Improved High-Radix Carry-Save Adders for Low-Latency Vector Reduction on FPGA [Communication écrite]. 23rd IEEE Interregional NEWCAS Conference (NEWCAS 2025), Paris, France. Lien externe
Hajizadeh, F., Masoom, A., Ould-Bachir, T., & David, J. P. (2025). FPGA-based simulation of grid-tied converters using frequency-dependent network equivalent. Electric Power Systems Research, 252, 112400. Présentée à International Conference on Power Systems Transients (IPST 2025), Guadalajara, Mexico. Lien externe
Hajizadeh, F., Ould-Bachir, T., & David, J. P. (2025). Enhancing CuFP library with self-alignment technique. Computers, 14(4), 118 (22 pages). Disponible
Rahmati, M., Boyer, F.-R., Pontikakis, B., David, J. P., & Savaria, Y. (2025). P4Muse: Enabling Modular P4 Programming via Compiler-Managed Code Merging Without Syntax Modifications. IEEE Access, 20 pages. Lien externe
