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Daigneault, M.-A., & David, J. P. (février 2013). Hardware description and synthesis of control-intensive reconfigurable dataflow architectures [Communication écrite]. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2013), Monterey, Calif.. Lien externe
Daigneault, M.-A., & David, J. P. (avril 2013). High-level description and synthesis of floating-point accumulators on FPGA [Communication écrite]. 21st Annual International IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2013), Seattle, WA, United states. Lien externe
David, J. P. (décembre 2013). Max-hashing fragments for large data sets detection [Communication écrite]. International Conference on Reconfigurable Computing and FPGAs (ReConFig 2013), Cancun, Mexico (6 pages). Lien externe
Ould-Bachir, T., & David, J. P. (2013). Self-alignment schemes for the implementation of addition-related floating-point operators. ACM Transactions on Reconfigurable Technology and Systems, 6(1), 1-21. Lien externe
Ould-Bachir, T., Dufour, C., Bélanger, J., Mahseredjian, J., & David, J. P. (juin 2011). A Fully Automated Reconfigurable Calculation Engine Dedicated to the Real-Time Simulation of High Switching Frequency Power Electronic Circuits [Communication écrite]. ELECTRIMACS 2011, Cergy-Pontoise, France. Publié dans Mathematics and Computers in Simulation, 91. Lien externe
