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Allard, M., Grogan, P., Savaria, Y., & David, J. P. (mai 2012). Two-level configuration for FPGA: A new design methodology based on a computing fabric [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2012), Seoul, Korea, Republic of. Lien externe
Blanchette, H. F., Ould-Bachir, T., & David, J. P. (2012). A State-Space Modeling Approach for the FPGA-Based Real-Time Simulation of High Switching Frequency Power Converters. IEEE Transactions on Industrial Electronics, 59(12), 4555-4567. Lien externe
Daigneault, M. A., & David, J. P. Synchronized-Transfer-Level Design Methodology Applied to Hardware Matrix Multiplication [Communication écrite]. International Conference on Reconfigurable Computing and Fpgas (Reconfig 2012), Cancun, Mexico (7 pages). Lien externe
Daigneault, M.-A., & David, J. P. (août 2012). Raising the abstraction level of HDL for control-dominant applications [Communication écrite]. 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), Oslo, Norway. Lien externe
Ould-Bachir, T., Dufour, C., Belanger, J., Mahseredjian, J., & David, J. P. (mai 2012). Effective floating-point calculation engines intended for the FPGA-based HIL simulation [Communication écrite]. 21st IEEE International Symposium on Industrial Electronics (ISIE 2012), Hangzhou, China. Lien externe
Blanchette, H. F., Ould-Bachir, T., & David, J. P. (2012). A State-Space Modeling Approach for the FPGA-Based Real-Time Simulation of High Switching Frequency Power Converters. IEEE Transactions on Industrial Electronics, 59(12), 4555-4567. Lien externe
Ould-Bachir, T., Dufour, C., Belanger, J., Mahseredjian, J., & David, J. P. (mai 2012). Effective floating-point calculation engines intended for the FPGA-based HIL simulation [Communication écrite]. 21st IEEE International Symposium on Industrial Electronics (ISIE 2012), Hangzhou, China. Lien externe
