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Dong, Z. J., Zaki, M. H., Al Sammane, G., Tahar, S., & Bois, G. (août 2007). Run-time verification using the VHDL-AMS simulation environment [Communication écrite]. 5th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montreal, Qc, Canada. Lien externe
Zaki, M. H., Al-Sammane, G., Tahar, S., & Bois, G. (novembre 2007). Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs [Communication écrite]. Formal Methods in Computer Aided Design (FMCAD 2007), Austin, TX, USA (9 pages). Lien externe