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Benny, O., Rondonneau, M., Chevalier, J., Bois, G., Aboulhamid, E. M., & Boyer, F.-R. (mars 2004). SoC software refinement approach for a systemC platform [Communication écrite]. Design & Verification Conference & Exhibition (DVCon 2004), San Jose, California. Non disponible
Bois, G., Filion, L., Tsikhanovich, A., & Aboulhamid, E. M. (2004). Modélisation, raffinement et programmation orientée objet avec SystemC. Dans Spécification et validation des systèmes monopuces (p. 171-208). Lien externe
Chevalier, J., Benny, O., Rondonneau, E. M., Bois, G., & Boyer, F.-R. (2004). SPACE : a hardware/software system C modeling platform including and RTOS. Dans Languages for System Specification : Selected Contributions on UML, SystemC, System Verilog, Mixed-Signal Systems, and Property Specification from FDL'03 (p. 91-104). Lien externe
Cyr, G., Bois, G., & Aboulhamid, M. (2004). Generation of processor interface for SoC using standard communication protocol. IEE Proceedings. Computers and Digital Techniques, 151(5), 367-376. Lien externe
Dubois, M., Bois, G., & Savaria, Y. (2004). Double profiling methodology for video processing platform. WSEAS Transactions on Computers, 3(6), 1802-1807. Non disponible
Lapalme, J., Aboulhamed, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (juin 2004). Esys.net: A New Solution for Embedded Systems Modeling and Simulation [Communication écrite]. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2004), Washington, D.C.. Publié dans ACM Sigplan Notices, 39(7). Lien externe
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (février 2004). [dot]Net framework - A solution for the next generation tools for system-level modeling and simulation [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe
Quinn, D., Lavigueur, B., Bois, G., & Aboulhamid, M. (février 2004). A system level exploration platform and methodology for network applications based on configurable processors [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe
Regimbal, S., Savaria, Y., & Bois, G. (juillet 2004). Verification strategy determination using dependence analysis of transaction-level models [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe