Documents publiés en "1996"

Département de génie électrique

Rayapati, V. N., & Kamińska, B. (1996). Interconnect propagation delay modeling and validation for the 16-MB CMOS SRAM chip. IEEE Transactions on Components, Packaging, and Manufacturing Technology. Part B, Advanced Packaging, 19(3), 605-614. Lien externe

Département de génie informatique et génie logiciel

Rayapati, V. N., & Kamińska, B. (1996). Interconnect propagation delay modeling and validation for the 16-MB CMOS SRAM chip. IEEE Transactions on Components, Packaging, and Manufacturing Technology. Part B, Advanced Packaging, 19(3), 605-614. Lien externe