Documents publiés en "1989"

Dagenais, M., & Rumin, N. (1989). On the calculation of optimal clocking parameters in synchronous circuits with level-sensitive latches. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 8(3), 268-278. Lien externe

Gaiotti, S., Dagenais, M. R., & Rumin, N. (juin 1989). Worst-case delay estimation of transistor groups [Communication écrite]. 26th Design Automation Conference (DAC 1989), Las Vegas, NV, USA. Lien externe