 | Monter d'un niveau |
Provost, G., Cantin, M. A., Sawan, M., Cardinal, C., Savaria, Y., & Haccoun, D. (mai 2005). Fast parameters optimization of an iterative decoder using a configurable hardware accelerator [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japon. Lien externe
Provost, G., Sawan, M., Cardinal, C., & Haccoun, D. (juin 2005). Implementation and error performance evaluation of an iterative decoding algorithm [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005). Lien externe
