 | Up a level |
Collaboration networkThis graph maps the connections between all the collaborators of {}'s publications listed on this page.
Each link represents a collaboration on the same publication. The thickness of the link represents the number of collaborations.
Use the mouse wheel or scroll gestures to zoom into the graph.
You can click on the nodes and links to highlight them and move the nodes by dragging them.
Hold down the "Ctrl" key or the "⌘" key while clicking on the nodes to open the list of this person's publications.
Loiseau, L., & Savaria, Y. (2003). Design reuse. In System-on-chip for real-time applications (Vol. 711, pp. 29-82). External link
Loiseau, L., & Savaria, Y. (2002, July). Methodologies and Strategies for Effective Design-Reuse [Paper]. System-on-Chip for Real-Time Applications. External link
Dido, J., Geraudie, N., Loiseau, L., Payeur, O., Savaria, Y., & Poirier, D. (2002, February). A flexible floating-point format for optimizing data-paths and operators in FPGA based DSPs [Paper]. 10th ACM International Symposium on Field-Programmable Gate Arrays (FPGA 2002). External link
Loiseau, L., & Savaria, Y. (2002). Methodologies and Strategies for Effective Design Reuse. Canadian Journal of Electrical and Computer Engineering, 27(4), 165-169. Unavailable
