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Documents dont l'auteur est "Fayomi, C. J. B."

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Nombre de documents: 8

A

Achigui, H. F., Sawan, M., & Fayomi, C. J. B. (2008). A Monolithic Based Nirs Front-End Wireless Sensor. Microelectronics Journal, 39(10), 1209-1217. Lien externe

Achigui, H. F., Fayomi, C. J. B., & Sawan, M. (juin 2005). A 1 V low-power low-noise DTMOS based class AB opamp [Communication écrite]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005). Lien externe

Achigui, H. F., Fayomi, C. J. B., & Sawan, M. (décembre 2003). DTMOS-based 1 V opamp [Communication écrite]. 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), Sharjah, United Arab Emirates. Lien externe

F

Fayomi, C. J. B., Sawan, M., & Roberts, G. W. (2004). Reliable circuit techniques for low-voltage analog design in deep submicron standard CMOS: a tutorial. Analog Integrated Circuits and Signal Processing, 39(1), 21-38. Lien externe

Fayomi, C. J. B., Roberts, G. W., & Sawan, M. (mai 2001). 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 mu m CMOS technology [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, NSW, Australia. Lien externe

Fayomi, C. J. B., Sawan, M., & Roberts, G. W. (mai 2001). A design strategy for a 1-V rail-to-rail input/output CMOS opamp [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2001), Sydney, NSW, Australia. Lien externe

Fayomi, C. J. B., Roberts, G. W., & Sawan, M. (mai 2000). Low power/low voltage high speed CMOS differential track and latch comparator with rail-to-rail input [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. Lien externe

Fayomi, C. J. B., Roberts, G. W., & Sawan, M. (janvier 2000). Low-Voltage Cmos Analog Switch for High Precision Sample-and-Hold Circuit [Communication écrite]. 43rd IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2000), Lansing. Lien externe

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