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Items where Author is "Cerny, E."

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Number of items: 5.

A

Abderrahman, A., Cerny, E., & Kaminska, B. (1999). Worst Case Tolerance Analysis and Clp-Based Multifrequency Test Generation for Analog Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(3), 332-345. External link

Abderrahman, A., Cerny, E., & Kaminska, B. (1997, April). CLP-based multifrequency test generation for analog circuits [Paper]. 1997 15th VLSI Test Symposium, Monterey, CA, USA. External link

Abderrahman, A., Cerny, E., & Kaminska, B. (1996). Optimization-based multifrequency test generation for analog circuits. Journal of Electronic Testing: Theory and Applications (JETTA), 9(1-2), 59-73. External link

B

Boubezari, S., Cerny, E., Kaminska, B., & Nadeau-Dostie, B. (1999). Testability Analysis and Test-Point Insertion in Rtl Vhdl Specifications for Scan-Based Bist. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 18(9), 1327-1340. External link

Bois, G., & Cerny, E. (1996). Efficient generation of diagonal constraints for 2-D mask compaction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15(9), 1119-1126. External link

List generated on: Sun Mar 3 08:42:14 2024 EST