 | Monter d'un niveau |
Calbaza, D. E., Cordos, I., Seth-Smith, N., & Savaria, Y. (mai 2004). An Adpll Circuit Using a Ddps for Genlock Applications [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004). Lien externe
Calbaza, D. E., & Savaria, Y. (2002). A Direct Digital Period Synthesis Circuit. IEEE Journal of Solid-State Circuits, 37(8), 1039-1045. Lien externe
Calbaza, D. E., & Savaria, Y. (2001). Direct Digital Frequency Synthesis of Low-Jitter Clocks. IEEE Journal of Solid-State Circuits, 36(3), 570-572. Lien externe
Calbaza, D. E., & Savaria, Y. (mai 2000). Direct digital frequency synthesis of low-jitter clocks [Communication écrite]. IEEE Custom Integrated Circuits Conference, Orlando, FL, USA. Lien externe
Calbaza, D. E., & Savaria, Y. (octobre 2000). A direct digitally delay generator [Communication écrite]. 23rd International Semiconductor Conference (CAS 2000), Sinaia, Romania. Lien externe
