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Alizadeh, R., Belanger, N., Savaria, Y., & Boyer, F.-R. (juin 2016). Performance characterization of an SCMA decoder [Communication écrite]. 14th IEEE International New Circuits and Systems Conference (NEWCAS 2016), Vancouver, Canada (4 pages). Lien externe
Beucher, N., Belanger, N., Savaria, Y., & Bois, G. (octobre 2006). Motion Compensated Frame Rate Conversion Using a Specialized Instruction Set Processor [Communication écrite]. IEEE Workshop on Signal Processing Systems Design and Implementation, Banff, AB, Canada. Lien externe
Belanger, N., & Savaria, Y. (juin 2006). On the design of a double precision logarithmic number system arithmetic unit [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Belanger, N., Desaulniers, G., Soumis, F., & Desrosiers, J. (2006). Periodic Airline Fleet Assignment With Time Windows, Spacing Constraints, and Time Dependent Revenues. European Journal of Operational Research, 175(3), 1754-1766. Lien externe
Belanger, N., Desaulniers, G., Soumis, F., Desrosiers, J., & Lavigne, J. (2006). Weekly Airline Fleet Assignment With Homogeneity. Transportation Research. Part B, Methodological, 40(4), 306-318. Lien externe
Dubois, M., Savaria, Y., Haccoun, D., & Belanger, N. (2006). Low-power configurable and generic shift register hardware realisations for convolutional encoders and decoders. IEE Proceedings. Circuits, Devices and Systems, 153(3), 207-213. Lien externe
Hasan, S. R., Belanger, N., Savaria, Y., & Ahmad, M. O. (2011). All digital skew tolerant synchronous interfacing methods for high-performance point-to-point communications in deep sub-micron SoCs. Integration, the VLSI Journal, 44(1), 22-38. Lien externe
Hasan, S. R., Belanger, N., Savaria, Y., & Ahmad, M. O. (2010). Crosstalk Glitch Propagation Modeling for Asynchronous Interfaces in Globally Asynchronous Locally Synchronous Systems. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(8), 2020-2031. Lien externe
Hasan, S. R., Belanger, N., Savaria, Y., & Ahmad, M. O. (2010). Crosstalk-Glitch Gating: A Solution for Designing Glitch-Tolerant Asynchronous Handshake Interface Mechanisms for GALS Systems. IEEE Transactions on Circuits and Systems I: Regular Papers, 57(10), 2696-707. Lien externe
Hasan, S. R., Belanger, N., & Savaria, Y. (octobre 2008). All-digital skew-tolerant interfacing method for systems with rational frequency ratios among multiple clock domains: leveraging a priori timing information [Communication écrite]. 1st Microsystems and Nanoelectronics Research Conference. Lien externe
Kowarzyk, G., Belanger, N., Haccoun, D., & Savaria, Y. (2013). Efficient parallel search algorithm for determining optimal R=1/2 systematic convolutional self-doubly orthogonal codes. IEEE Transactions on Communications, 61(3), 865-876. Lien externe
Kowarzyk, G., Belanger, N., Haccoun, D., & Savaria, Y. (2012). Efficient Search Algorithm for Determining Optimal R=1/2 Systematic Convolutional Self-Doubly Orthogonal Codes. IEEE Transactions on Communications, 60(1), 3-8. Lien externe
Mbaye, M., Belanger, N., Savaria, Y., & Pierre, S. (juillet 2008). Loop-oriented metrics for exploring an application-specific architecture design-space [Communication écrite]. International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2008). Lien externe
Mbaye, M. M., Belanger, N., Savaria, Y., & Pierre, S. (2007). A Novel Application-Specific Instruction-Set Processor Design Approach for Video Processing Acceleration. Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 47(3), 297-315. Lien externe
Mbaye, M., Lebel, D., Belanger, N., Savaria, Y., & Pierre, S. (mai 2006). Design exploration with an application-specific instruction-set processor for ELA deinterlacing [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
