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Documents dont l'auteur est "Aboulhamid, M."

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Nombre de documents: 8

B

Bouchebaba, Y., Gagne, V., Nicolescu, G., & Aboulhamid, M. (juin 2006). SoC memory optimization using loop transformations [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe

C

Cyr, G., Bois, G., & Aboulhamid, M. (2004). Generation of processor interface for SoC using standard communication protocol. IEE Proceedings. Computers and Digital Techniques, 151(5), 367-376. Lien externe

Charest, L., Aboulhamid, M., & Bois, G. (2003). Applying multi-paradigm and patterns approaches to hardware/software design and reuse. Dans Patterns and skeletons for parallel and distributed computing (97-325). Lien externe

Chabini, N., Aboulhamid, M., & Savaria, Y. (janvier 2001). Determining schedules for reducing power consuption using mulyiple supply voltages [Communication écrite]. International Conference on Computer Design (ICCD 2001), Austin, Texas. Lien externe

Chabini, N., Aboulhamid, M., & Savaria, Y. (janvier 2001). Efficient methods for reducing register and phase requirements for synchronous circuits derived using software pipeling techniques [Communication écrite]. European Conference on Circuit Theory and Design, Espoo, Finland. Non disponible

M

Moss, L., De Nanclas, M., Filion, L., Fontaine, S., Bois, G., & Aboulhamid, M. (avril 2007). Seamless hardware/software performance co-monitoring in a codesign simulation environment with RTOS support [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. Lien externe

Q

Quinn, D., Lavigueur, B., Bois, G., & Aboulhamid, M. (février 2004). A system level exploration platform and methodology for network applications based on configurable processors [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe

R

Regimbal, S., Lemire, J. F., Savaria, Y., Bois, G., Aboulhamid, M., & Baron, A. (juillet 2002). Aspect Partitioning for Hardware Verification Reuse [Communication écrite]. System-on-Chip for Real-Time Applications. Lien externe

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