Documents dont l'auteur est "Al-Khalili, Dhamin"

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Nombre de documents: 13

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Athow, J. L., Rozon, C., Al-Khalili, D., & Langlois, J. M. P. (décembre 2011). A CNFET-based characterization framework for digital circuits [Communication écrite]. 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon. Lien externe

Al-Khalili, D., & Langlois, J. M. P. (2003). Phase to sine amplitude conversion system and method. (Brevet no US6657573). Lien externe

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Gao, S., Al-Khalili, D., Langlois, J. M. P., & Chabini, N. (2017). Efficient realization of BCD multipliers using FPGAs. International Journal of Reconfigurable Computing, 2017, 1-12. Disponible

Gao, S., Al-Khalili, D., Langlois, J. M. P., & Chabini, N. (avril 2017). Decimal floating-point multiplier with binary-decimal compression based fixed-point multiplier [Communication écrite]. 30th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2017), Windsor, ON, Canada (6 pages). Lien externe

Gao, S., Chabini, N., Al-Khalili, D., & Langlois, J. M. P. (2010). FPGA-based efficient design approaches for large size two's complement squarers. Journal of Signal Processing Systems, 58(1), 3-15. Lien externe

Gao, S., Chabini, N., Al-Khalili, D., & Langlois, J. M. P. (novembre 2005). Optimized multipliers for large unsigned integers [Communication écrite]. NORCHIP Conference, Oulu, Finlande. Lien externe

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Kong, M. Y., Langlois, J. M. P., & Al-Khalili, D. (mai 2008). Efficient FPGA implementation of complex multipliers using the logarithmic number system [Communication écrite]. IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United states. Lien externe

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Langlois, J. M. P. (2003). Novel design approach and architectures for sinusoid output direct digital frequency synthesis [Thèse de doctorat, Royal Military College of Canada]. Lien externe

Langlois, J. M. P., & Al-Khalili, D. (2003). Novel approach to the design of direct digital frequency synthesizers based on linear interpolation. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 50(9), 567-578. Lien externe

Langlois, J. M. P., & Al-Khalili, D. (avril 2002). A low power direct digital frequency synthesizer with 60 dBc spectral purity [Communication écrite]. 12th ACM Great Lakes symposium on VLSI, New York, NY, USA. Lien externe

Langlois, J. M. P., Al-Khalili, D., & Inkol, R. J. (2002). Polyphase filter approach for high performance, FPGA-based quadrature demodulation. Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 32(3), 237-254. Lien externe

Langlois, J. M. P., & Al-Khalili, D. (mai 2002). Hardware optimized direct digital frequency synthesizer architecture with 60 dBc spectral purity [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2002), Scottsdale, Arizona, USA. Lien externe

Langlois, J. M. P. (2000). Design and implementation of wide band quadrature demodulators on field programmable gate arrays [Mémoire de maîtrise, Royal Military College of Canada]. Lien externe

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