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Energy optimization of LDPC decoder circuits with timing violations

François Leduc-Primeau, Frank R. Kschischang and Warren J. Gross

Paper (2015)

Document published while its authors were not affiliated with Polytechnique Montréal

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PolyPublie URL: https://publications.polymtl.ca/41653/
Conference Title: IEEE International Conference on Communications (ICC 2015)
Conference Location: London, UK
Conference Date(s): 2015-06-08 - 2015-06-12
Publisher: IEEE
DOI: 10.1109/icc.2015.7248356
Official URL: https://doi.org/10.1109/icc.2015.7248356
Date Deposited: 18 Apr 2023 15:07
Last Modified: 05 May 2023 15:46
Cite in APA 7: Leduc-Primeau, F., Kschischang, F. R., & Gross, W. J. (2015, June). Energy optimization of LDPC decoder circuits with timing violations [Paper]. IEEE International Conference on Communications (ICC 2015), London, UK. https://doi.org/10.1109/icc.2015.7248356

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