S. Gao, D. Al-Khalili, N. Chabini and J. M. Pierre Langlois
Article (2012)
An external link is available for this itemDepartment: | Department of Computer Engineering and Software Engineering |
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PolyPublie URL: | https://publications.polymtl.ca/15390/ |
Journal Title: | IET Computers and Digital Techniques (vol. 6, no. 6) |
Publisher: | IET |
DOI: | 10.1049/iet-cdt.2011.0146 |
Official URL: | https://doi.org/10.1049/iet-cdt.2011.0146 |
Date Deposited: | 18 Apr 2023 15:10 |
Last Modified: | 25 Sep 2024 15:52 |
Cite in APA 7: | Gao, S., Al-Khalili, D., Chabini, N., & Langlois, J. M. P. (2012). Asymmetric large size multipliers with optimised FPGA resource utilisation. IET Computers and Digital Techniques, 6(6), 372-83. https://doi.org/10.1049/iet-cdt.2011.0146 |
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