Items where Author is "Chabini, Ismaïl"

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Chabini, N., Chabini, I., Aboulhamid, E. M., & Savaria, Y. (2003, April). Unification of basic retiming and supply voltage scaling to minimize dynamic power consumption for synchronous digital designs [Paper]. Great Lakes Symposium on VLSI (GLSVLSI 2003), Washington, D. C., USA. External link

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. Minimizing the Number of Phases in Clocked Digital Designs Derived Using Modulo Scheduling Techniques [Paper]. Icm 2002: 14th International Conference on Microelectronics. External link

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (2002, August). Minimizing the number of registers and the number of phases in synchronous digital designs with minimal clock period [Paper]. 45th Midwest Symposium on Circuits and Systems (MWSCAS 2002), Tulsa, OK, USA. External link

List generated on: Sun Oct 4 16:25:24 2026 EDT